PhantaField™ · PFG-1

SophonThe memory wall, demolished.

330 GB of DRAM living inside the compute array — not across a package, not on an interposer. ~100× the weight bandwidth of any HBM4 GPU. One die that trains and serves an 80B model.

Read the WhitepaperRequest ASIC Brief
80-tier monolithic stack — true scale0.35 µm tiers · 28 µm stack · drag to rotate
Logic / CIM2T0C DRAMSi CMOS BaseMIV Via

Every GPU ever built moves weights across a package to reach the math. Sophon puts the memory above the MAC — connected by a vertical via fabric with 10⁸ slots per square millimeter. The bottleneck doesn't get faster. It ceases to exist.

Architecture

Three Decisions, One Die

Sophon interleaves 40 logic tiers and 40 memory tiers in a monolithic 2D-TMD stack. Each DRAM cell sits directly above the MAC that consumes it — connected by sub-100 nm vias, not a bus.

01Memory

2T0C Gain-Cell DRAM

  • 2T0C gain cell — 8 F², no capacitor, 1 fA/µm off-current
  • 1.8 s retention → refresh at just 1 Hz
  • Fully writable: gradient accumulation at 20 fJ/bit
02Compute

Pure Digital CIM

  • 256×256 subarray per tile · binary sense amp + 8-level adder tree
  • Bit-serial activation at 500 MHz · 16 cycles BF16, 8 cycles FP8
  • No analog conversion — deterministic, drift-free arithmetic
03Platform

2D-TMD Monolithic 3D

  • 28 nm Si CMOS base + 40 logic/memory doublets (80 tiers)
  • MIV vias at 90 nm pitch · 1.23 × 10⁸ slots/mm² · >99% headroom
  • BEOL growth ≤ 450 °C via NanoGalaxy PPMOCVD
  • 28 µm total stack — grown monolithically, no wafer bonding
Specifications

Reference Design Metrics

PFG-1 reference configuration. Production variants can adjust tier count, tile geometry, and memory density.

Benchmark

vs. NVIDIA Rubin & AMD MI455X

Rubin and MI455X post higher peak dense TFLOPS. But real inference at low batch is bandwidth-bound — and there, Sophon wins on every metric that governs actual throughput.

22 TB/s
Rubin
19.6 TB/s
MI455X
2.1 PB/s
Sophon
Weight bandwidth95–107×
300
Rubin
270
MI455X
14,438
Sophon
Decode throughput · 80B48–53×
880
Rubin
785
MI455X
2,406
Sophon
Training throughput2.7–3.1×
0.22
Rubin
0.22
MI455X
38.7
Sophon
Tokens/watt · 80B174×
$82,800
Rubin
$96,700
MI455X
$7,369
Sophon
Bill of materials11.2–13.1×

Decode throughput modeled at batch 1, 80B parameters, FP8 mode (BF16-native decode is 7,219 tokens/s). Rubin / MI455X throughput estimated from 2026 vendor bandwidth and TDP specs; GPU cost from Morgan Stanley VR200 NVL72 rack estimates (÷ 72); Sophon figures modeled, pre-silicon.

Where the advantage lives: batch size

Sophon is compute-bound from the very first stream — its throughput is a flat ceiling, not a ramp. A GPU only catches up by stacking ~48–53 concurrent users onto one chip; a transformer-only ASIC (Etched Sohu) needs ~220. Below those crossovers — chat, agents, long-context reasoning — each Sophon user keeps ~1,800 tokens/s at batch 8, ~6× a GPU’s best, and no batching strategy closes that gap. Each process node lifts the ceiling further: 23,387 tokens/s at 22 nm, 149,700 at 7 nm.

interactive / agentic (B = 1–8)1101001,0001001k10k100kBatch size B (concurrent streams)Aggregate tok/s22 nm14 nm10 nm7 nmN4N328 nmSophon — flat ceiling from B = 1B ≈ 48–53: GPUs catch upB ≈ 220: Sohu
(a) Aggregate throughput — 80B FP8
interactive / agentic (B = 1–8)1101001,000101001k10kBatch size B (concurrent streams)tok/s per userB = 8: ~1,800 tok/s per user≈ 6× a GPU’s best
(b) Per-stream rate — what each user sees
PFG-1 Sophon (1 die, 373 W)NVIDIA Rubin R200 (1 GPU)Etched Sohu (1 chip, est.)AMD MI455X (1 GPU)Cerebras WSE-3 ×2 (~46 kW, est.)Sophon node roadmap 22 nm→N3 (§7 + extrapolation)

Roofline model, 80B FP8 decode, single accelerator. Etched Sohu and Cerebras WSE-3 figures estimated from public claims (no published BOM or power data); Cerebras shown as a 2-wafer SRAM-resident system (~46 kW, ~120× Sophon’s power). Dotted lines: Sophon node roadmap, 22 nm→N3 (projected / extrapolated). Whitepaper §5.A.5c, Figure 8b.

Scaling Ceiling

Designed for Brain-Scale AI

When data-center power — not transistors — is the binding constraint, the largest model you can serve is fixed by energy per token. Sophon spends 174× less, so its energy-bounded ceiling on model size is ~173× higher (≈448× at the 7 nm node): it puts brain scale — 100-trillion-parameter models, on the order of the human brain’s synapse count — within a feasible power envelope, where HBM-bound GPUs stay pinned near today’s frontier.

To train a 100T MoE in a 1 GW build — how long it takes and the fleet you must buy, Sophon (28 nm) vs HBM4 GPUs:

≈4.9 mo
Rubin
≈4.1 mo
MI455X
≈3.9 mo
Sophon
Training time · 1 GW · 100T MoEparity at 28 nm → ≈1.5 mo at 7 nm
$46B
Rubin
$57B
MI455X
$16B
Sophon
Fleet hardware capex · 1 GW · 100T2.9–3.7× lower

All three fill the same 1 GW build and train the same ≈ 2.5×10²⁸-FLOP, 48× MoE. At 28 nm, Sophon’s ≈3.6–3.8× more, lower-power dies (472 W vs 1,700–1,800 W) deliver roughly the same aggregate FLOP/s — near-parity in training time (≈4–5 months for all three) — but the fleet costs ~2.9–3.7× less to build; the 7 nm node then finishes ≈2.7–3.3× faster (≈1.5 months). Batched training is compute-bound and near per-FLOP parity — the 174× advantage above is on serving, which is memory-bound.

Space Grade

Radiation-Hard by Physics, Not by Shielding

No capacitor to upset, an atomically thin channel with nowhere to collect charge, and a 1 Hz refresh that rewrites every bit before errors accumulate.

SAME 150 µm FIELD · SAME ION · SAME SCALE1T1C HBM · 50 µm PER DIEONE MEMORY PLANE EVERY 50 µmBULK Si · DIE 1BULK Si · DIE 2BULK Si · DIE 3DEEP-TRENCH CAPACITORS · 6× ZOOM≈3.5 µm deep · 1 capacitor per bitevery plane fed charge by ~46 µm of bulk → bits flipSOPHON · 80 TIERS IN 28 µmA MEMORY PLANE EVERY 0.70 µm28 µmTHE ENTIRE STACK — 330 GB + 4,200 TFLOPS —IS HALF OF ONE HBM DIE THICKno bulk anywhere → nothing to collect, nothing to flip50 µm50 µm
≤ 3 / dayMemory errors in GEO

vs 230–2,300 on an HBM4 GPU — modeled, CREME96 spectrum.

0 kgAdded shielding

Rad-hard from device physics — no tantalum vault, no mass penalty, no derating.

2D-TMD has already flown — a wafer-scale MoS₂ system ran nine months on orbit (Nature, 2026). The accelerator that survives without shielding mass becomes the default for space compute. Read the full analysis · why space needs this chip

Products & Services

Buy the Chip, or Run on Ours

Three ways to put Sophon to work — own the silicon, or use it as a service for training and inference.

01Chip Sales

Buy the Silicon

Purchase PFG-1 Sophon as packaged silicon or full accelerator boards — no HBM anywhere in the bill of materials. Sold to AI labs, neoclouds, enterprises, and defense programs, with rad-hard variants for space.

02Model Training

Train on Sophon

A managed training service on Sophon clusters: bring your data and model, we run frontier-scale pretraining and fine-tuning at a fraction of the energy and TCO of an HBM4 GPU fleet. Elastic capacity, no hardware to own.

03Inference API

Serve via API

Hosted, pay-per-token inference on Sophon — high single-stream throughput at a fraction of the energy per token of any GPU. OpenAI-compatible endpoints for open and custom models, with private and on-prem options.

Get Started

Run frontier AI without the memory wall.

PhantaField sells Sophon silicon and runs managed training and inference on it — for AI labs, clouds, enterprises, and defense. NDA-protected technical briefings on request.

Request ASIC Brief